1. Field of the Invention
The present invention relates to transferring data between an initiator and target over a bus, and more particularly concerns such transfers via a bridge that translates between a first and second protocol.
2. Related Art
It is often desirable to develop new computer systems that have improvements in some aspects of the systems, but which selectively reuse some components, or at least minimize changes to some of the components. For example, computer systems commonly include master (a.k.a. “initiator”) and target devices that transfer data over a system bus. In a new release of such a system, it may be desirable to adopt a new or modified bus protocol without changing, or at least minimally changing, certain intitiator or target devices. This may include maintaining support of old bus protocols for the initiator and target devices.
A “protocol” is defined as a “set of formal rules describing how to transmit data. Low level protocols define the electrical and physical standards to be observed, bit- and byte-ordering and the transmission and error detection and correction of the bit stream. High level protocols deal with the data formatting, including the syntax of messages, the terminal to computer dialogue, character sets, sequencing of messages etc. Protocols are defined, for example, in Peripheral Component Interconnect (“PCI”) specifications published by the PCI special interest group, available at www.pcisig.com, and in IBM CoreConnect bus architecture specifications, elements of which include the processor local bus (PLB), the on-chip peripheral bus (OPB), a bus bridge, and a device control register (DCR) bus, defined in specifications available at www.ibm.com. The PCI specifications and CoreConnect specifications are hereby incorporated herein by reference. One conventional approach for addressing these objectives is to require new devices to recognize when they're transferring data to or from an old device and perform the transfer using the old protocol, which the old device still uses. This convention has at least two drawbacks. First, the new devices have increased complexity, because they must support both the old and new protocols. Secondly, when an old protocol device participates in a transfer on the bus, the transfer is typically done at the speed of the old bus. However, the new protocol typically supports higher speed transfers, so this fails to take advantage of the increased speed of the new protocol.
A second approach for addressing these objectives is to provide a “bridge” that converts transfer from the old protocol to the new protocol, and vice versa. This is advantageous from the standpoint that it does not require new devices to support the old protocol.
A bridge may be “simple” or “complex,” depending on how it handles write transactions. A complex bridge performs “write posting” in which the bridge signals to a write initiator the progress, or even completion, of a write transfer before the bridge receives an indication of progress or completion from the destination bus. In a more extreme case, the bridge may even signal progress or completion before the bridge has even sent the write data to the destination. Because write posting involves the bridge gathering and holding data for and information about a write transfer, it allows the bridge to transmit the write data on the destination bus at a speed that is more nearly optimal for that bus. However, write posting also has some drawbacks. First, in this context it is important to maintain necessary ordering requirements for system transfers. For example, ordering logic must be built in to prevent execution of certain read transactions after a bridge has accepted but before the bridge has completed certain write transactions. This logic, of course, adds complexity to the system and may also increase latency. For example, a complex bridge may hold up a transaction due to an ambiguity, although the transaction could actually proceed.
A simple bridge does not include buffering and does not post write transactions nor signal progress to an initiating device until progress has been signaled to the bridge from the target device. This eliminates the ordering problems described above, but results in failure, once again, to take full advantage of the increased speed of the new protocol. That is, an initiator device of the old type, using the old protocol, is only capable of sending data at the slower speed of the old protocol. Since the initiator device using a simple bridge does not sent write data until the target is ready to receive it, once the old initiator is granted control of the bus for the write transfer the bus is monopolized by the transfer for the longer interval required for the slower transfer rate.
Based on the above, it should be appreciated that a need exists for and need exists for improvements in data transfer from one protocol to another.